244 search results - page 30 / 49 » Optimizing Loop Performance for Clustered VLIW Architectures |
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
— One of the critical goals in code optimization for MPSoC architectures is to minimize the number of off-chip memory accesses. This is because such accesses can be extremely cos...
HPCA
2009
IEEE
14 years 8 months ago
2009
IEEE
Some instructions have more impact on processor performance than others. Identification of these critical instructions can be used to modify and improve instruction processing. Pr...
ISPDC
2008
IEEE
14 years 2 months ago
2008
IEEE
This paper presents a new approach for analyzing the performance of grid scheduling algorithms for tasks with dependencies. Finding the optimal procedures for DAG scheduling in Gr...
HPCA
2000
IEEE
14 years 6 days ago
2000
IEEE
Growth and usage trends for large decision support databases indicate that there is a need for architectures that scale the processing power as the dataset grows. To meet this nee...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
DNA sequence comparison is a computationally intensive problem, known widely since the competition for human DNA decryption. Database search for DNA sequence comparison is of grea...