244 search results - page 43 / 49 » Optimizing Loop Performance for Clustered VLIW Architectures |
SBACPAD
2003
IEEE
14 years 1 months ago
2003
IEEE
— A radiative transfer solver that implements the LTSn method was optimized and parallelized using the MPI message passing communication library. Timing and profiling informatio...
ICDE
2005
IEEE
14 years 9 months ago
2005
IEEE
A popular architecture for enterprise applications is one of a stateless object-based server accessing persistent data through Object-Relational mapping software. The reported ben...
DAC
2003
ACM
14 years 8 months ago
2003
ACM
Sleep transistors are effective to reduce dynamic and leakage power. The cluster-based design was proposed to reduce the sleep transistor area by clustering gates to minimize the ...
CGO
2010
IEEE
14 years 2 months ago
2010
IEEE
Tiling is a widely used loop transformation for exposing/exploiting parallelism and data locality. Effective use of tiling requires selection and tuning of the tile sizes. This is...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
We apply a scalable approach for practical, comprehensive design space evaluation and optimization. This approach combines design space sampling and statistical inference to ident...