Sciweavers

363 search results - page 59 / 73
» Optimizing Memory Accesses For Spatial Computation
Sort
View
HIPC
2000
Springer
13 years 11 months ago
Improving Offset Assignment on Embedded Processors Using Transformations
Embedded systems consisting of the application program ROM, RAM, the embedded processor core and any custom hardware on a single wafer are becoming increasingly common in areas suc...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
DAC
2004
ACM
14 years 8 months ago
Data compression for improving SPM behavior
Scratch-pad memories (SPMs) enable fast access to time-critical data. While prior research studied both static and dynamic SPM management strategies, not being able to keep all ho...
Ozcan Ozturk, Mahmut T. Kandemir, I. Demirkiran, G...
DATE
2003
IEEE
97views Hardware» more  DATE 2003»
14 years 29 days ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
G. Surendra, Subhasis Banerjee, S. K. Nandy
CASES
2006
ACM
14 years 1 months ago
High-level languages for small devices: a case study
In this paper we study, through a concrete case, the feasibility of using a high-level, general-purpose logic language in the design and implementation of applications targeting w...
Manuel Carro, José F. Morales, Henk L. Mull...
SBACPAD
2003
IEEE
106views Hardware» more  SBACPAD 2003»
14 years 28 days ago
A Parallel Implementation of the LTSn Method for a Radiative Transfer Problem
— A radiative transfer solver that implements the LTSn method was optimized and parallelized using the MPI message passing communication library. Timing and profiling informatio...
Roberto P. Souto, Haroldo F. de Campos Velho, Step...