2932 search results - page 113 / 587 » Optimizing Memory System Performance for Communication in Pa... |
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
With the ongoing advancements in VLSI technology, the performance of an embedded system is determined to a large extend by the communication of data and instructions. This results...
CF
2010
ACM
14 years 2 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...
ICPP
2008
IEEE
14 years 3 months ago
2008
IEEE
On systems with multi-core processors, the memory access scheduling scheme plays an important role not only in utilizing the limited memory bandwidth but also in balancing the pro...
PDP
2006
IEEE
14 years 3 months ago
2006
IEEE
We explore the possibilities to organize a query data structure in the main memories or hard disks of a cluster computer. The query data structure serves to improve the performanc...
EUROPAR
2009
Springer
14 years 3 months ago
2009
Springer
Optimal network performance is critical to efficient parallel scaling for communication-bound applications on large machines. With wormhole routing, no-load latencies do not increa...