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» Optimizing Power Consumption in Large Scale Storage Systems
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ERSA
2008
185views Hardware» more  ERSA 2008»
13 years 9 months ago
Design Framework for Partial Run-Time FPGA Reconfiguration
Partial reconfiguration (PR) reveals many opportunities for integration into FPGA design for potential system optimizations such as reduced area, increased performance, and increa...
Chris Conger, Ann Gordon-Ross, Alan D. George
HPDC
2005
IEEE
14 years 1 months ago
Generosity and gluttony in GEMS: grid enabled molecular simulations
Biomolecular simulations produce more output data than can be managed effectively by traditional computing systems. Researchers need distributed systems that allow the pooling of...
Justin M. Wozniak, Paul Brenner, Douglas Thain, Aa...
SIAMSC
2010
151views more  SIAMSC 2010»
13 years 6 months ago
An Inner-Outer Iteration for Computing PageRank
We present a new iterative scheme for PageRank computation. The algorithm is applied to the linear system formulation of the problem, using inner-outer stationary iterations. It is...
David F. Gleich, Andrew P. Gray, Chen Greif, Tracy...
CODES
2003
IEEE
14 years 29 days ago
A multiobjective optimization model for exploring multiprocessor mappings of process networks
In the Sesame framework, we develop a modeling and simulation environment for the efficient design space exploration of heterogeneous embedded systems. Since Sesame recognizes se...
Cagkan Erbas, Selin C. Erbas, Andy D. Pimentel
MICRO
2003
IEEE
109views Hardware» more  MICRO 2003»
14 years 28 days ago
TLC: Transmission Line Caches
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
Bradford M. Beckmann, David A. Wood