The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
Abstract -- This paper presents a novel, Boolean approach to LUTbased FPGA technology mapping targeting high performance. As the core of the approach, we have developed a powerful ...
We describe a novel hardware architecture for genomic and proteomic sequence alignment which achieves a speed-up of two to three orders of magnitude over Smith-Waterman dynamic pr...
Abstract— As technology scales to 0.13 micron and below, designs are requiring buffers to be inserted on interconnects of even moderate length for both critical paths and fixing...
Zhuo Li, Cliff C. N. Sze, Charles J. Alpert, Jiang...
— Flexible distribution of data in the form of quantum bits (qubits) amongst spatially separated entities is an essential component of envisioned scalable quantum computing archi...
Rahul Ratan, Manish Kumar Shukla, A. Yavuz Oru&cce...