1912 search results - page 45 / 383 » Optimizing interconnection policies |
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
— As microprocessor technology continues to scale into the nanometer regime, recent studies show that interconnect delay will be a limiting factor for performance, and multiple c...
TCAD
2002
13 years 9 months ago
2002
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
ESORICS
2010
Springer
13 years 10 months ago
2010
Springer
Abstract. In distributed computer systems, it is possible that the evaluation of an authorization policy may suffer unexpected failures, perhaps because a sub-policy cannot be eval...
ICCAD
2004
IEEE
14 years 6 months ago
2004
IEEE
We demonstrate an algorithmfor interconnect modeling in rhe presence ofprocess variation based on extension of the truncated balanced realizationmodel reduction algorithmto multi-...
ISPASS
2009
IEEE
14 years 4 months ago
2009
IEEE
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...