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INFOCOM
2005
IEEE
15 years 9 months ago
Optimal load-balancing
— This paper is about load-balancing packets across multiple paths inside a switch, or across a network. It is motivated by the recent interest in load-balanced switches. Load-ba...
Isaac Keslassy, Cheng-Shang Chang, Nick McKeown, D...
DAC
2005
ACM
16 years 4 months ago
A low latency router supporting adaptivity for on-chip interconnects
The increased deployment of System-on-Chip designs has drawn attention to the limitations of on-chip interconnects. As a potential solution to these limitations, Networks-on -Chip...
Jongman Kim, Dongkook Park, Theo Theocharides, Nar...
CLUSTER
2009
IEEE
15 years 10 months ago
Overlapping computation and communication in SMT clusters with commodity interconnects
Abstract—In this paper we focus on optimizing the performance in a cluster of Simultaneous Multithreading (SMT) processors connected with a commodity interconnect (e.g. Gbit Ethe...
Georgios I. Goumas, Nikos Anastopoulos, Nectarios ...
DAC
1999
ACM
15 years 7 months ago
Reducing Cross-Coupling Among Interconnect Wires in Deep-Submicron Datapath Design
As the CMOS technology enters the deep submicron design era, the lateral inter-wire coupling capacitance becomes the dominant part of load capacitance and makes RC delay on the bu...
Joon-Seo Yim, Chong-Min Kyung
147
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IPPS
1997
IEEE
15 years 7 months ago
Cyclic Networks: A Family of Versatile Fixed-Degree Interconnection Architectures
In this paper, we propose a new family of interconnection networks, called cyclic networks (CNs), in which an intercluster connection is defined on a set of nodes whose addresses...
Chi-Hsiang Yeh, Behrooz Parhami