1912 search results - page 61 / 383 » Optimizing interconnection policies |
GECCO
2004
Springer
14 years 2 months ago
2004
Springer
Software design techniques emphasize the use of abstractions to help developers deal with the complexity of constructing large and complex systems. These abstractions can also be u...
GLVLSI
1996
IEEE
14 years 1 months ago
1996
IEEE
In this paper, we propose a global routing algorithm for multi-layer building-block layouts. The algorithm is based on successive ripup and rerouting while satisfying edge capacit...
TCAD
2008
13 years 9 months ago
2008
Recently, the microprocessor industry is headed in the direction of multicore designs in order to continue the chip performance growth. We investigate buffer insertion, which is a ...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
— Circuit placement has a large impact on all aspects of performance; speed, power consumption, reliability, and cost are all affected by the physical locations of interconnected...
ICCD
2004
IEEE
14 years 6 months ago
2004
IEEE
A cache access time model, PRACTICS (PRedictor of Access and Cycle TIme for Cache Stack), has been developed to optimize the memory array architecture for the minimum access and c...