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DICS
2006
13 years 11 months ago
Autonomic Computing for Virtual Laboratories
Virtual laboratories can be characterized by their long-lasting, large-scale computations, where a collection of heterogeneous tools is integrated into data processing pipelines. S...
Cesare Pautasso, Win Bausch, Gustavo Alonso
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
14 years 1 months ago
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jun...
ESTIMEDIA
2009
Springer
13 years 5 months ago
Inter-kernel data reuse and pipelining on chip-multiprocessors for multimedia applications
The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency req...
Luis Angel D. Bathen, Yongjin Ahn, Nikil D. Dutt, ...
DSN
2005
IEEE
14 years 1 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
DAC
2012
ACM
11 years 9 months ago
Equivalence checking for behaviorally synthesized pipelines
Loop pipelining is a critical transformation in behavioral synthesis. It is crucial to producing hardware designs with acceptable latency and throughput. However, it is a complex ...
Kecheng Hao, Sandip Ray, Fei Xie