2703 search results - page 122 / 541 » Optimizing memory transactions |
ICCD
2001
IEEE
14 years 5 months ago
2001
IEEE
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...
SIGMOD
2011
ACM
12 years 11 months ago
2011
ACM
In this demonstration we present BRRL, a library for making distributed main-memory applications fault tolerant. BRRL is optimized for cloud applications with frequent points of c...
HPCA
2002
IEEE
14 years 1 months ago
2002
IEEE
Configurations of contemporary DRAM memory systems become increasingly complex. A recent study [5] shows that application performance is highly sensitive to choices of configura...
CF
2009
ACM
14 years 3 months ago
2009
ACM
Hybrid architectures combining the strengths of generalpurpose processors with application-specific hardware accelerators can lead to a significant performance improvement. Our ...
PDP
2006
IEEE
14 years 2 months ago
2006
IEEE
Commodity symmetric multiprocessors (SMPs), though originally intended for transaction processing, because of their availability, are now used for numerical analysis applications ...