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COMCOM
2006
138views more  COMCOM 2006»
13 years 8 months ago
Reducing memory fragmentation in network applications with dynamic memory allocators optimized for performance
The needs for run-time data storage in modern wired and wireless network applications are increasing. Additionally, the nature of these applications is very dynamic, resulting in ...
Stylianos Mamagkakis, Christos Baloukas, David Ati...
IOLTS
2008
IEEE
112views Hardware» more  IOLTS 2008»
14 years 3 months ago
A Modular Memory BIST for Optimized Memory Repair
An efficient on-chip infrastructure for memory test and repair is crucial to enhance yield and availability of SoCs. Most of the existing built-in self-repair solutions reuse IP-C...
Philipp Öhler, Alberto Bosio, Giorgio Di Nata...
ISSS
1997
IEEE
128views Hardware» more  ISSS 1997»
14 years 8 days ago
Architectural Exploration and Optimization of Local Memory in Embedded Systems
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
ISCA
2002
IEEE
68views Hardware» more  ISCA 2002»
14 years 1 months ago
Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior
Techniques for analyzing and improving memory referencing behavior continue to be important for achieving good overall program performance due to the ever-increasing performance g...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
ICCD
2006
IEEE
143views Hardware» more  ICCD 2006»
14 years 5 months ago
Improving Power and Data Efficiency with Threaded Memory Modules
—The technique of module-threading utilizes standard DDR DRAM components to build modified memory modules. These modified modules incorporate one or more additional control signa...
Frederick A. Ware, Craig Hampel