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ICCAD
2007
IEEE
109views Hardware» more  ICCAD 2007»
14 years 4 months ago
Inductive equivalence checking under retiming and resynthesis
Retiming and resynthesis are among the most important techniques for practical sequential circuit optimization. However, their applicability is much limited due to verification c...
Jie-Hong Roland Jiang, Wei-Lun Hung
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
13 years 11 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling