867 search results - page 23 / 174 » Optimizing synthesis with metasketches |
TNN
1998
13 years 9 months ago
1998
—In this paper we examine a technique by which fault tolerance can be embedded into a feedforward network leading to a network tolerant to the loss of a node and its associated w...
DATE
2007
IEEE
14 years 4 months ago
2007
IEEE
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
JPDC
2006
13 years 9 months ago
2006
We address the problem of efficient out-of-core code generation for a special class of imperfectly nested loops encoding tensor contractions arising in quantum chemistry computati...
ICCAD
1998
IEEE
14 years 1 months ago
1998
IEEE
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
IJSYSC
2000
13 years 9 months ago
2000
This paper is concerned with the design of robust state feedback controllers for a class of uncertain time-delay systems. The uncertainty is assumed to satisfy a certain integral ...