1990 search results - page 15 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
INFOCOM
1999
IEEE
13 years 12 months ago
1999
IEEE
We describe the design, implementation and performance of a Web server accelerator which runs on an embedded operating system and improves Web server performance by caching data. ...
PARA
2004
Springer
14 years 27 days ago
2004
Springer
Cache optimizations typically include code transformations to increase the locality of memory accesses. An orthogonal approach is to enable for latency hiding by introducing prefet...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Share of leakage in cache memories is increasing with technology scaling. Studies show that most stored bits in instruction caches are zero, and hence, asymmetric SRAM cells which...
IWMM
2009
Springer
14 years 2 months ago
2009
Springer
Dynamic binary instrumentation systems are used to inject or modify arbitrary instructions in existing binary applications; several such systems have been developed over the past ...