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» Optimizing the Thermal Behavior of Subarrayed Data Caches
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HPCA
2008
IEEE
14 years 7 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
JCP
2007
181views more  JCP 2007»
13 years 6 months ago
Reducing Energy Consumption of Wireless Sensor Networks through Processor Optimizations
When the environmental conditions are stable, a typical Wireless Sensor Network (WSN) application may sense and process very similar or constant data values for long durations. Thi...
Gürhan Küçük, Can Basaran
QEST
2006
IEEE
14 years 28 days ago
Optimization of Cache Expiration Dates in Content Networks
One of the fundamental decisions in content networks is how the information about the existing contents is deployed and accessed. In particular, in many content network architectu...
Héctor Cancela, Pablo Rodríguez-Bocc...
IEEEPACT
2009
IEEE
14 years 1 months ago
SOS: A Software-Oriented Distributed Shared Cache Management Approach for Chip Multiprocessors
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
Lei Jin, Sangyeun Cho
ANCS
2009
ACM
13 years 4 months ago
EINIC: an architecture for high bandwidth network I/O on multi-core processors
This paper proposes a new server architecture EINIC (Enhanced Integrated NIC) for multi-core processors to tackle the mismatch between network speed and host computational capacit...
Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, Steve...