143 search results - page 18 / 29 » Optimizing transactions for captured memory |
CC
2002
Springer
13 years 7 months ago
2002
Springer
Global variable promotion, i.e. allocating unaliased globals to registers, can significantly reduce the number of memory operations. This results in reduced cache activity and less...
EMSOFT
2005
Springer
14 years 1 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
MICRO
2011
IEEE
13 years 2 months ago
2011
IEEE
In a modern chip-multiprocessor system, memory is a shared resource among multiple concurrently executing threads. The memory scheduling algorithm should resolve memory contention...
PVLDB
2011
13 years 2 months ago
2011
New hardware platforms, e.g. cloud, multi-core, etc., have led to a reconsideration of database system architecture. Our Deuteronomy project separates transactional functionality ...
SPAA
1995
ACM
13 years 11 months ago
1995
ACM
For years, the computation rate of processors has been much faster than the access rate of memory banks, and this divergence in speeds has been constantly increasing in recent yea...