337 search results - page 19 / 68 » Optimizing yield in global routing |
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
— With advanced VLSI manufacturing technology in deep submicron (DSM) regime, we can integrate entire electronic systems on a single chip (SoC). Due to the complexity in SoC desi...
PIMRC
2008
IEEE
14 years 2 months ago
2008
IEEE
—We present an iterative joint scheduling-routing algorithm for characterizing the long-term performance of a cellular-relaying network. The physical layer model is based on idea...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Abstract-- In nanometer-scale VLSI technologies, several interconnect issues like routing congestion and interconnect delay have become the main concerns in placement. However, all...
ICCV
2011
IEEE
12 years 7 months ago
2011
IEEE
We present an active geodesic contour model in which we constrain the evolving active contour to be a geodesic with respect to a weighted edge-based energy through its entire evol...
ICMCS
2005
IEEE
14 years 1 months ago
2005
IEEE
When an ad hoc network with limited link capacities is used to transport high-rate, latency-constrained multimedia streams, it is important that routing algorithms not only yield ...