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FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 1 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
ICMCS
2006
IEEE
159views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Image Vector Quantization Indices Recovery using Lagrange Interpolation
Vector quantization (VQ) is an efficient coding algorithm due to its fast decoding efficiency. Indices of VQ will be lost during the transmission because of the signal interferenc...
Yung-Gi Wu, Chia-Hao Wu
ICPADS
2006
IEEE
14 years 1 months ago
The Impact of Information Availability and Workload Characteristics on the Performance of Job Co-allocation in Multi-clusters
In this paper, we utilize a bandwidth-centric job communication model that captures the interaction and impact of simultaneously co-allocating jobs across multiple clusters. We ma...
William M. Jones, Walter B. Ligon III, Nishant Shr...
ICNP
2005
IEEE
14 years 1 months ago
Robust Multiclass Signaling Overload Control
We propose multi-class signaling overload control algorithms, for telecommunication switches, that are robust against different input traffic patterns and system upgrades. In ord...
Sneha Kumar Kasera, José Pinheiro, Catherin...
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...