339 search results - page 17 / 68 » Overview on Low Power SoC Design Technology |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
When designing a System-on-Chip (SoC) using a Networkon-Chip (NoC), silicon area and power consumption are two key elements to optimize. A dominant part of the NoC area and power ...
IWSOC
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper describes current state-of-the-art research on low power wireless systems for medical applications. Distinct design criteria and challenges in this area are addressed. ...
JCP
2008
13 years 7 months ago
2008
In this paper a new low power and high performance adder cell using a new design style called "Bridge" is proposed. The bridge design style enjoys a high degree of regula...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC p...