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DATE
2007
IEEE
150views Hardware» more  DATE 2007»
14 years 2 months ago
A low-SER efficient core processor architecture for future technologies
Device scaling in new and future technologies brings along severe increase in the soft error rate of circuits, for combinational and sequential logic. Although potential solutions...
Eduardo Luis Rhod, Carlos Arthur Lang Lisbôa...
HPDC
2006
IEEE
14 years 1 months ago
ALPS: An Application-Level Proportional-Share Scheduler
ALPS is a per-application user-level proportional-share scheduler that operates with low overhead and without any special kernel support. ALPS is useful to a range of applications...
Travis Newhouse, Joseph Pasquale
CORR
2006
Springer
87views Education» more  CORR 2006»
13 years 7 months ago
Synchronization recovery and state model reduction for soft decoding of variable length codes
Abstract-- Variable length codes (VLCs) exhibit desynchronization problems when transmitted over noisy channels. Trellis decoding techniques based on Maximum A Posteriori (MAP) est...
Simon Malinowski, Herve Jegou, Christine Guillemot
ICCV
2007
IEEE
13 years 9 months ago
Ten-fold Improvement in Visual Odometry Using Landmark Matching
Our goal is to create a visual odometry system for robots and wearable systems such that localization accuracies of centimeters can be obtained for hundreds of meters of distance ...
Zhiwei Zhu, Taragay Oskiper, Supun Samarasekera, R...
MS
2003
13 years 9 months ago
Information-theoretic Competitive Learning
— In this paper, we propose a new supervised learning method whereby information is controlled by the associated cost in an intermediate layer, and in an output layer, errors bet...
Ryotaro Kamimura