138 search results - page 8 / 28 » PADded Cache: A New Fault-Tolerance Technique for Cache Memo... |
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
EUROPAR
2000
Springer
13 years 11 months ago
2000
Springer
With the increasing processing power, the latency of the memory hierarchy becomes the stumbling block of many modern computer architectures. In order to speed-up the calculations, ...
ISCA
2010
IEEE
13 years 12 months ago
2010
IEEE
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Scratch-pad memory is becoming an important fixture in embedded multimedia systems. It is significantly more efficient than the cache, in performance and power, and has the add...
ACMMSP
2004
ACM
14 years 1 months ago
2004
ACM
As superscalar processors become increasingly wide, it is inevitable that the large set of instructions to be fetched every cycle will span multiple noncontiguous basic blocks. Th...