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EUROPAR
2001
Springer
15 years 9 months ago
Execution Latency Reduction via Variable Latency Pipeline and Instruction Reuse
Operand bypass logic might be one of the critical structures for future microprocessors to achieve high clock speed. The delay of the logic imposes the execution time budget to be ...
Toshinori Sato, Itsujiro Arita
ICRA
1995
IEEE
188views Robotics» more  ICRA 1995»
15 years 8 months ago
Fast Approximation of Range Images by Triangular Meshes Generated through Adaptive Randomized Sampling
This paper describes and evaluates an efficient technique that allows the fast generation of 3D triangular meshes from range images avoiding optimization procedures. Such a tool ...
Miguel Angel García
DAWAK
2008
Springer
15 years 6 months ago
Efficient Data Distribution for DWS
The DWS (Data Warehouse Striping) technique is a data partitioning approach especially designed for distributed data warehousing environments. In DWS the fact tables are distribute...
Raquel Almeida, Jorge Vieira, Marco Vieira, Henriq...
TIP
2010
90views more  TIP 2010»
14 years 11 months ago
Fast Query for Exemplar-Based Image Completion
In this paper, we present a fast algorithm for filling unknown regions in an image using the strategy of exemplarmatching. Unlike the original exemplar-based method using exhaustiv...
Tsz-Ho Kwok, Hoi Sheung, Charlie C. L. Wang
HPCA
2008
IEEE
16 years 4 months ago
Fabric convergence implications on systems architecture
Converged fabrics that support data, storage, and cluster networking in a unified fashion are desirable for their cost and manageability advantages. Recent trends towards higher-b...
Kevin Leigh, Parthasarathy Ranganathan, Jaspal Sub...