Sciweavers

339 search results - page 9 / 68
» PC Desktop Performance and Hardware Performance Counters
Sort
View
ISPASS
2007
IEEE
14 years 1 months ago
Complete System Power Estimation: A Trickle-Down Approach Based on Performance Events
This paper proposes the use of microprocessor performance counters for online measurement of complete system power consumption. While past studies have demonstrated the use of per...
W. Lloyd Bircher, Lizy K. John
MICRO
2008
IEEE
111views Hardware» more  MICRO 2008»
14 years 1 months ago
Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
Livio Soares, David K. Tam, Michael Stumm
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
14 years 4 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
IPPS
2007
IEEE
14 years 1 months ago
Green Supercomputing in a Desktop Box
The advent of the Beowulf cluster in 1994 provided dedicated compute cycles, i.e., supercomputing for the masses, as a cost-effective alternative to large supercomputers, i.e., su...
Wu-chun Feng, Avery Ching, Chung-Hsing Hsu
ERSA
2008
145views Hardware» more  ERSA 2008»
13 years 8 months ago
Multicore Devices: A New Generation of Reconfigurable Architectures
For two decades, reconfigurable computing systems have provided an attractive alternative to fixed hardware solutions. Reconfigurable computing systems have demonstrated the low c...
Steven A. Guccione