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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
14 years 22 days ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
ICCAD
1995
IEEE
180views Hardware» more  ICCAD 1995»
14 years 8 days ago
Design based analog testing by Characteristic Observation Inference
In this paper, a new approach to analog test design based on the circuit design process, called Characteristic Observation Inference (COI), is presented. In many situations, it is...
Walter M. Lindermeir, Helmut E. Graeb, Kurt Antrei...
IJCAI
2007
13 years 10 months ago
Compiling Bayesian Networks by Symbolic Probability Calculation Based on Zero-Suppressed BDDs
Compiling Bayesian networks (BNs) is one of the hot topics in the area of probabilistic modeling and processing. In this paper, we propose a new method of compiling BNs into multi...
Shin-ichi Minato, Ken Satoh, Taisuke Sato
NLUCS
2008
13 years 10 months ago
Ontology-driven Vaccination Information Extraction
Increasingly, medical institutions have access to clinical information through computers. The need to process and manage the large amount of data is motivating the recent interest ...
Liliana Ferreira, António Teixeira, Jo&atil...
AAAI
2006
13 years 10 months ago
Compact, Convex Upper Bound Iteration for Approximate POMDP Planning
Partially observable Markov decision processes (POMDPs) are an intuitive and general way to model sequential decision making problems under uncertainty. Unfortunately, even approx...
Tao Wang, Pascal Poupart, Michael H. Bowling, Dale...