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MICRO
2006
IEEE
88views Hardware» more  MICRO 2006»
13 years 7 months ago
SWICH: A Prototype for Efficient Cache-Level Checkpointing and Rollback
Low-overhead checkpointing and rollback is a popular technique for fault recovery. While different approaches are possible, hardware-supported checkpointing and rollback at the ca...
Radu Teodorescu, Jun Nakano, Josep Torrellas
RTS
2006
129views more  RTS 2006»
13 years 7 months ago
Modeling out-of-order processors for WCET analysis
Estimating the Worst Case Execution Time (WCET) of a program on a given processor is important for the schedulability analysis of real-time systems. WCET analysis techniques typic...
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra
ICLP
2005
Springer
14 years 1 months ago
Modeling Systems in CLP
We present a methodology for the modeling of complex program behavior in CLP. In the first part we present an informal description about how to represent a system in CLP. At its ...
Joxan Jaffar, Andrew E. Santosa, Razvan Voicu
IISWC
2008
IEEE
14 years 2 months ago
Evaluating the impact of dynamic binary translation systems on hardware cache performance
Dynamic binary translation systems enable a wide range of applications such as program instrumentation, optimization, and security. DBTs use a software code cache to store previou...
Arkaitz Ruiz-Alvarez, Kim M. Hazelwood
IISWC
2006
IEEE
14 years 1 months ago
Performance Analysis of Sequence Alignment Applications
— Recent advances in molecular biology have led to a continued growth in the biological information generated by the scientific community. Additionally, this area has become a m...
Friman Sánchez, Esther Salamí, Alex ...