Sciweavers

230 search results - page 14 / 46
» PPM Reduction on Embedded Memories in System on Chip
Sort
View
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
14 years 12 days ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
VLSID
2008
IEEE
138views VLSI» more  VLSID 2008»
14 years 7 months ago
Memory Architecture Exploration Framework for Cache Based Embedded SOC
Today's feature-rich multimedia products require embedded system solution with complex System-on-Chip (SoC) to meet market expectations of high performance at a low cost and l...
T. S. Rajesh Kumar, C. P. Ravikumar, R. Govindaraj...
DATE
2004
IEEE
177views Hardware» more  DATE 2004»
13 years 11 months ago
Adaptive Prefetching for Multimedia Applications in Embedded Systems
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...
Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
CARDIS
2004
Springer
93views Hardware» more  CARDIS 2004»
14 years 27 days ago
On-the-Fly Metadata Stripping for Embedded Java Operating Systems
Considering the typical amount of memory available on a smart card, it is essential to minimize the size of the runtime environment to leave as much memory as possible to applicati...
Christophe Rippert, Damien Deville
ASAP
2006
IEEE
134views Hardware» more  ASAP 2006»
13 years 9 months ago
Buffer and register allocation for memory space optimization
In today's embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia appl...
Youcef Bouchebaba, Gabriela Nicolescu, El Mostapha...