66 search results - page 11 / 14 » Packet Delay-Aware Scheduling in Input Queued Switches |
CN
2006
13 years 6 months ago
2006
As buffer-less crossbar scheduling algorithms reach their practical limitations due to higher port numbers and data rates, internally buffered crossbar (IBC) switches have gained ...
GLVLSI
2005
IEEE
14 years 10 days ago
2005
IEEE
In this paper we propose an FPGA implementation of a multi protocol Weighted Fair (WF) queuing algorithm able to handle variable length packets targeted for Packet Over Sonet (POS...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
With the rapid development of broadband applications, the capability of networks to provide quality of service (QoS) has become an important issue. Fair scheduling algorithms are ...
IPPS
2002
IEEE
13 years 11 months ago
2002
IEEE
In modern resource management systems for supercomputers and HPC-clusters the job-scheduler plays a major role in improving the performance and usability of the system. The perfor...
FCCM
2006
IEEE
14 years 23 days ago
2006
IEEE
— Dedicated, spatially configured FPGA interconnect is efficient for applications that require high throughput connections between processing elements (PEs) but with a limited ...