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DAC
2002
ACM
14 years 8 months ago
Dynamic hardware plugins in an FPGA with partial run-time reconfiguration
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
Edson L. Horta, John W. Lockwood, David E. Taylor,...
MIDDLEWARE
2007
Springer
14 years 1 months ago
Domain-based context management for dynamic and evolutionary environments
Research in context-aware computing has produced a number of application prototypes, frameworks, middlewares and models for describing context. However, development of ubiquitous ...
Ricardo Couto Antunes da Rocha, Markus Endler
IWCMC
2010
ACM
14 years 19 days ago
Only the short die old: route optimization in MANETs by dynamic subconnection shrinking
In reactive routing protocols, active routes for multihop connections retain their topological structure in spite of node movement over time. Unfortunately, node movements may mak...
Zeki Bilgin, Bilal Khan, Ala I. Al-Fuqaha
ISI
2006
Springer
13 years 7 months ago
An Embedded Bayesian Network Hidden Markov Model for Digital Forensics
In the paper we combine a Bayesian Network model for encoding forensic evidence during a given time interval with a Hidden Markov Model (EBN-HMM) for tracking and predicting the de...
Olivier Y. de Vel, Nianjun Liu, Terry Caelli, Tib&...
ISCA
2006
IEEE
162views Hardware» more  ISCA 2006»
14 years 1 months ago
Design and Management of 3D Chip Multiprocessors Using Network-in-Memory
Long interconnects are becoming an increasingly important problem from both power and performance perspectives. This motivates designers to adopt on-chip network-based communicati...
Feihui Li, Chrysostomos Nicopoulos, Thomas D. Rich...