Sciweavers

42 search results - page 7 / 9
» Page-Level Behavior of Cache Contention
Sort
View
DATE
2010
IEEE
107views Hardware» more  DATE 2010»
14 years 22 days ago
Worst case delay analysis for memory interference in multicore systems
Abstract—Employing COTS components in real-time embedded systems leads to timing challenges. When multiple CPU cores and DMA peripherals run simultaneously, contention for access...
Rodolfo Pellizzoni, Andreas Schranzhofer, Jian-Jia...
PE
2010
Springer
175views Optimization» more  PE 2010»
13 years 2 months ago
Generalized ERSS tree model: Revisiting working sets
Accurately characterizing the resource usage of an application at various levels in the memory hierarchy has been a long-standing research problem. Existing characterization studi...
Ricardo Koller, Akshat Verma, Raju Rangaswami
ISCA
2011
IEEE
333views Hardware» more  ISCA 2011»
12 years 11 months ago
The impact of memory subsystem resource sharing on datacenter applications
In this paper we study the impact of sharing memory resources on five Google datacenter applications: a web search engine, bigtable, content analyzer, image stitching, and protoc...
Lingjia Tang, Jason Mars, Neil Vachharajani, Rober...
WWW
2004
ACM
14 years 8 months ago
Challenges and practices in deploying web acceleration solutions for distributed enterprise systems
For most Web-based applications, contents are created dynamically based on the current state of a business, such as product prices and inventory, stored in database systems. These...
Divyakant Agrawal, K. Selçuk Candan, Koji H...
USITS
2003
13 years 9 months ago
Model-Based Resource Provisioning in a Web Service Utility
Internet service utilities host multiple server applications on a shared server cluster. A key challenge for these systems is to provision shared resources on demand to meet servi...
Ronald P. Doyle, Jeffrey S. Chase, Omer M. Asad, W...