Abstract. An efficient parallel algorithm is presented and tested for computing selected components of H−1 where H has the structure of a Hamiltonian matrix of two-dimensional la...
Lin Lin, Chao Yang, Jianfeng Lu, Lexing Ying, Wein...
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...
This article proposes a novel parallel, hardware-oriented deadlock detection algorithm for multiprocessor system-on-chips. The proposed algorithm takes full advantage of hardware ...
The LLL algorithm is a well-known and widely used lattice basis reduction algorithm. In many applications, its speed is critical. Parallel computing can improve speed. However, th...
A parallel rule-extracting algorithm based on the improved discernibility matrix [2] is proposed, by this way, a large amount of raw data can be divided into some small portions to...