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» Parallel Computing with FPGAs - Concepts and Applications
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HPCA
2005
IEEE
14 years 7 months ago
Using Virtual Load/Store Queues (VLSQs) to Reduce the Negative Effects of Reordered Memory Instructions
The use of large instruction windows coupled with aggressive out-oforder and prefetching capabilities has provided significant improvements in processor performance. In this paper...
Aamer Jaleel, Bruce L. Jacob
HPCA
2004
IEEE
14 years 7 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
IEEEPACT
2007
IEEE
14 years 1 months ago
Architectural Support for the Stream Execution Model on General-Purpose Processors
There has recently been much interest in stream processing, both in industry (e.g., Cell, NVIDIA G80, ATI R580) and academia (e.g., Stanford Merrimac, MIT RAW), with stream progra...
Jayanth Gummaraju, Mattan Erez, Joel Coburn, Mende...
SAC
2006
ACM
14 years 1 months ago
On the architectural alignment of ATL and QVT
Transforming models is a critical activity in Model Driven Engineering (MDE). With the expected adoption of the OMG QVT standard for model transformation language it is anticipate...
Frédéric Jouault, Ivan Kurtev
CLUSTER
2005
IEEE
14 years 1 months ago
Memory Management Support for Multi-Programmed Remote Direct Memory Access (RDMA) Systems
Current operating systems offer basic support for network interface controllers (NICs) supporting remote direct memory access (RDMA). Such support typically consists of a device d...
Kostas Magoutis
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