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CODES
2010
IEEE
15 years 1 months ago
Hardware/software optimization of error detection implementation for real-time embedded systems
This paper presents an approach to system-level optimization of error detection implementation in the context of fault-tolerant realtime distributed embedded systems used for safe...
Adrian Lifa, Petru Eles, Zebo Peng, Viacheslav Izo...
RECONFIG
2009
IEEE
269views VLSI» more  RECONFIG 2009»
15 years 11 months ago
A 10 Gbps OTN Framer Implementation Targeting FPGA Devices
Abstract—Integrated circuits for very high-speed telecommunication protocols often use ASICs, due to their strict timing constraints. This scenario is changing, since modern FPGA...
Guilherme Guindani, Frederico Ferlini, Jeferson Ol...
ASAP
2008
IEEE
110views Hardware» more  ASAP 2008»
15 years 11 months ago
Design space exploration of a cooperative MIMO receiver for reconfigurable architectures
Cooperative MIMO is a new technique that allows disjoint wireless communication nodes (e.g. wireless sensors) to form a virtual antenna array to increase bandwidth, reliability an...
Shahnam Mirzaei, Ali Irturk, Ryan Kastner, Brad T....
APDC
1997
15 years 5 months ago
Language Support for Synchronous Parallel Critical Sections
We introduce a new parallel programming paradigm, namely synchronous parallel critical sections. Such parallel critical sections must be seen in the context of switching between s...
Christoph W. Keßler, Helmut Seidl
ICPP
2008
IEEE
15 years 11 months ago
Bridging the Gap Between Parallel File Systems and Local File Systems: A Case Study with PVFS
Parallel I/O plays an increasingly important role in today’s data intensive computing applications. While much attention has been paid to parallel read performance, most of this...
Peng Gu, Jun Wang, Robert Ross