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» Parallel Computing with FPGAs - Concepts and Applications
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PVM
2005
Springer
15 years 11 months ago
Implementing Byte-Range Locks Using MPI One-Sided Communication
We present an algorithm for implementing byte-range locks using MPI passive-target one-sided communication. This algorithm is useful in any scenario in which multiple processes of ...
Rajeev Thakur, Robert B. Ross, Robert Latham
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
15 years 11 months ago
Interactive Ray Tracing on Reconfigurable SIMD MorphoSys
MorphoSys is a reconfigurable SIMD architecture. In this paper, a BSP-based ray tracing is gracefully mapped onto MorphoSys. The mapping highly exploits ray-tracing parallelism. A...
Haitao Du, Marcos Sanchez-Elez, Nozar Tabrizi, Nad...
ICPP
2002
IEEE
15 years 11 months ago
EMPOWER: A Scalable Framework for Network Emulation
The development and implementation of new network protocols and applications need accurate, scalable, reconfigurable, and inexpensive tools for debugging, testing, performance tun...
Pei Zheng, Lionel M. Ni
ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 9 months ago
Tempest and Typhoon: User-Level Shared Memory
Future parallel computers must efficiently execute not only hand-coded applications but also programs written in high-level, parallel programming languages. Today's machines ...
Steven K. Reinhardt, James R. Larus, David A. Wood
DAGSTUHL
2006
15 years 7 months ago
Physical 2D Morphware and Power Reduction Methods for Everyone
Dynamic and partial reconfiguration discovers more and more the focus in academic and industrial research. Modern systems in e.g. avionic and automotive applications exploit the p...
Jürgen Becker, Michael Hübner, Katarina ...