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» Parallel High-Order Integrators
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CF
2007
ACM
14 years 29 days ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
ISCAPDCS
2003
13 years 10 months ago
On the Scalable Computation of Large Sets of Integrals
We consider efficient strategies for the parallel and distributed computation of large sets of multivariate integrals. These arise in many applications such as computational chem...
Elise de Doncker, Ajay K. Gupta, Laurentiu Cucos
SKG
2006
IEEE
14 years 3 months ago
Knowledge Discovery and Integration Based on A Novel Neural Network Ensemble Model
This article explores the utility of neural network ensembles in knowledge discovery and integration. A novel neural network ensemble model KBNNE (Knowledge-Based Neural Network E...
Yong Wang, Hong-Jie Xing
ASPDAC
2011
ACM
297views Hardware» more  ASPDAC 2011»
13 years 17 days ago
CELONCEL: Effective design technique for 3-D monolithic integration targeting high performance integrated circuits
3-D monolithic integration (3DMI), also termed as sequential integration, is a potential technology for future gigascale circuits. Since the device layers are processed in sequent...
Shashikanth Bobba, Ashutosh Chakraborty, Olivier T...
ICCAD
2002
IEEE
175views Hardware» more  ICCAD 2002»
14 years 5 months ago
Efficient model order reduction via multi-node moment matching
- The new concept of Multi-node Moment Matching (MMM) is introduced in this paper. The MMM technique simultaneously matches the moments at several nodes of a circuit using explicit...
Yehea I. Ismail