5553 search results - page 955 / 1111 » Parallel Implementation of Sch |
126
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ICDCSW
2003
IEEE
15 years 7 months ago
2003
IEEE
Most ad hoc networks do not implement any network access control, leaving these networks vulnerable to resource consumption attacks where a malicious node injects packets into the...
132
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IEEEPACT
2003
IEEE
15 years 7 months ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
118
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IEEEPACT
2003
IEEE
15 years 7 months ago
2003
IEEE
Shared memory multiprocessor systems typically provide a set of hardware primitives in order to support synchronization. Generally, they provide single-word read-modify-write hard...
117
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ISPASS
2003
IEEE
15 years 7 months ago
2003
IEEE
In this paper we present the eDragon environment, a research platform created to perform complete performance analysis of new Web-based technologies. eDragon enables the understan...
110
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MTDT
2003
IEEE
15 years 7 months ago
2003
IEEE
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...