We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
As the number of devices available per chip continues to increase, the computational potential of future computer architectures grows likewise. While this is a clear benefit for f...
Although shared memory programming models show good programmability compared to message passing programming models, their implementation by page-based software distributed shared m...
Path profiles provide a more accurate characterization of a program's dynamic behavior than basic block or edge profiles, but are relatively more expensive to collect. This h...
Kapil Vaswani, Aditya V. Nori, Trishul M. Chilimbi
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...