Sciweavers

206 search results - page 37 / 42
» Parallel Job Scheduling with Overhead: A Benchmark Study
Sort
View
DATE
2008
IEEE
138views Hardware» more  DATE 2008»
14 years 2 months ago
Functional Self-Testing for Bus-Based Symmetric Multiprocessors
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...
Andreas Apostolakis, Dimitris Gizopoulos, Mihalis ...
IPPS
2010
IEEE
13 years 5 months ago
KRASH: Reproducible CPU load generation on many-core machines
Abstract--In this article we present KRASH, a tool for reproducible generation of system-level CPU load. This tool is intended for use in shared memory machines equipped with multi...
Swann Perarnau, Guillaume Huard
IEEEPACT
2006
IEEE
14 years 1 months ago
Hardware support for spin management in overcommitted virtual machines
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
Philip M. Wells, Koushik Chakraborty, Gurindar S. ...
CCGRID
2008
IEEE
13 years 9 months ago
A Probabilistic Model to Analyse Workflow Performance on Production Grids
Production grids are complex and highly variable systems whose behavior is not well understood and difficult to anticipate. The goal of this study is to estimate the impact of the ...
Tristan Glatard, Johan Montagnat, Xavier Pennec
ISCA
2011
IEEE
386views Hardware» more  ISCA 2011»
12 years 11 months ago
Architecting on-chip interconnects for stacked 3D STT-RAM caches in CMPs
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...
Asit K. Mishra, Xiangyu Dong, Guangyu Sun, Yuan Xi...