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» Parallel Logic Simulation of VLSI Systems
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MJ
2007
119views more  MJ 2007»
13 years 7 months ago
Automated energy calculation and estimation for delay-insensitive digital circuits
With increasingly smaller feature sizes and higher on-chip densities, the power dissipation of VLSI systems has become a primary concern for designers. This paper first describes...
Venkat Satagopan, Bonita Bhaskaran, Anshul Singh, ...
ICCAD
2008
IEEE
246views Hardware» more  ICCAD 2008»
14 years 5 months ago
Integrated circuit design with NEM relays
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
Fred Chen, Hei Kam, Dejan Markovic, Tsu-Jae King L...
IPPS
2007
IEEE
14 years 2 months ago
Performance Modelling of Necklace Hypercubes
The necklace hypercube has recently been introduced as an attractive alternative to the well-known hypercube. Previous research on this network topology has mainly focused on topo...
Sina Meraji, Hamid Sarbazi-Azad, Ahmad Patooghy
FCCM
2002
IEEE
126views VLSI» more  FCCM 2002»
14 years 1 months ago
Hyperspectral Image Compression on Reconfigurable Platforms
NASA’s satellites currently do not make use of advanced image compression techniques during data transmission to earth because of limitations in the available platforms. With th...
Thomas W. Fry, Scott Hauck
SIGSOFT
2010
ACM
13 years 2 months ago
RT-simex: retro-analysis of execution traces
This presentation demonstrates the early results from the French ANR project RT-Simex. RT-Simex proposes a set of tools to analyze timing of parallel embedded code and trace the s...
Julien DeAntoni, Frédéric Mallet, Fr...