309 search results - page 10 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
EUROPAR
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. Prefetching transfers a data item in advance from its storage location to its usage location so that communication is hidden and does not delay computation. We present a ...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
SASP
2009
IEEE
14 years 2 months ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
PATMOS
2000
Springer
13 years 11 months ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...
SPAA
2010
ACM
14 years 9 days ago
2010
ACM
Energy consumption by computer systems has emerged as an important concern. However, the energy consumed in executing an algorithm cannot be inferred from its performance alone: i...