309 search results - page 50 / 62 » Parallel Memory Architecture for Arbitrary Stride Accesses |
HPDC
2006
IEEE
14 years 1 months ago
2006
IEEE
Trace-driven simulation is an important technique used in the evaluation of computer architecture innovations. However using it for studying parallel computers and applications is...
ISCA
2008
IEEE
14 years 1 months ago
2008
IEEE
Writing shared-memory parallel programs is error-prone. Among the concurrency errors that programmers often face are atomicity violations, which are especially challenging. They h...
CCGRID
2010
IEEE
13 years 6 months ago
2010
IEEE
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
ISLPED
2004
ACM
14 years 29 days ago
2004
ACM
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
FGCS
2006
13 years 7 months ago
2006
Tw o parallel programming models represented b y OpenMP and MPI are compared for PDE solvers based on regular sparse numerical operators. As a typical representative of such an app...