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DSD
2009
IEEE
124views Hardware» more  DSD 2009»
14 years 4 months ago
Network-on-Chip Architecture Exploration Framework
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...
Timo Schönwald, Jochen Zimmermann, Oliver Bri...
LTCONF
2007
Springer
14 years 3 months ago
Leveraging Parallel Corpora and Existing Wordnets for Automatic Construction of the Slovene Wordnet
The paper reports on a series of experiments conducted in order to test the feasibility of automatically generating synsets for Slovene wordnet. The resources used were the multil...
Darja Fiser
ROBIO
2006
IEEE
130views Robotics» more  ROBIO 2006»
14 years 3 months ago
GA-Based Multi-Objective Optimal Design of a Planar 3-DOF Cable-Driven Parallel Manipulator
— The architecture optimization of a three degrees of freedom (3-DOF) planar cable-driven parallel manipulator (CDPM) with multiple objectives has been implemented by means of GA...
Yangmin Li, Qingsong Xu
ICCS
2004
Springer
14 years 2 months ago
Evaluating the Performance of Skeleton-Based High Level Parallel Programs
We show in this paper how to evaluate the performance of skeleton-based high level parallel programs. Since many applications follow some commonly used algorithmic skeletons, we id...
Anne Benoit, Murray Cole, Stephen Gilmore, Jane Hi...
LATA
2009
Springer
14 years 1 months ago
On Parallel Communicating Grammar Systems and Correctness Preserving Restarting Automata
Abstract. This paper contributes to the study of Freely Rewriting Restarting Automata (FRR-automata) and Parallel Communicating Grammar Systems (PCGS) as formalizations of the ling...
Dana Pardubská, Martin Plátek, Fried...