833 search results - page 100 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
ANCS
2009
ACM
13 years 6 months ago
2009
ACM
In this paper, we propose an extensible Open-Architecture Services platform (OASis) for high-performance network processing. OASis embraces recent advances of open technologies, i...
ICCD
2006
IEEE
14 years 6 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...
MICRO
2009
IEEE
14 years 3 months ago
2009
IEEE
Modern DRAM systems rely on memory controllers that employ out-of-order scheduling to maximize row access locality and bank-level parallelism, which in turn maximizes DRAM bandwid...
ARCS
2006
Springer
14 years 23 days ago
2006
Springer
Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until t...
ARVLSI
1997
IEEE
14 years 18 days ago
1997
IEEE
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...