833 search results - page 10 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
ESTIMEDIA
2007
Springer
13 years 11 months ago
2007
Springer
Due to the increasing demands on efficiency, performance and flexibility reconfigurable computational architectures are very promising candidates in embedded systems design. Recent...
FCCM
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
IPPS
2003
IEEE
14 years 27 days ago
2003
IEEE
This work describes the implementation of digital reconfigurable systems (DRS) using commercial FPGA devices. This paper has three main goals. The first one is to present the tren...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
In reconfigurable systems, reconfiguration latency is a very important factor impact the system performance. In this paper, a framework is proposed that integrates the temporal pa...
IPPS
1998
IEEE
13 years 12 months ago
1998
IEEE
As part of its HiPer-D Program, the United States Navy is developing an experimental distributed system which achieves survivability by dynamically reconfiguring the system using ...