833 search results - page 19 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
IPPS
2003
IEEE
14 years 28 days ago
2003
IEEE
Reconfigurable hardware resources are very expensive, and yet can be underutilized. This paper describes a middleware capable of discovering underutilized computing nodes with FPG...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...
DATE
2010
IEEE
14 years 22 days ago
2010
IEEE
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
ERSA
2009
13 years 5 months ago
2009
Medium-grain reconfigurable hardware (MGRH) architectures represent a hybrid between the versatility of a field programmable gate array (FPGA) and the computational power of a cust...
IPPS
2000
IEEE
14 years 1 days ago
2000
IEEE
HeteroSort load balances and sorts within static or dynamic networks using a conceptual torus mesh. We ported HeteroSort to a 16-node Beowulf cluster with a central switch architec...