833 search results - page 23 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
SIGCOMM
2009
ACM
14 years 2 months ago
2009
ACM
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
FDL
2003
IEEE
14 years 29 days ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—Unknown protein sequences are often compared to a set of known sequences (a database scan) to detect functional similarities. Even though efficient dynamic programming algorithm...
CODES
2003
IEEE
14 years 29 days ago
2003
IEEE
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
IAT
2003
IEEE
14 years 29 days ago
2003
IEEE
This paper presents MPIAB, an agent based architecture for parallel processing. The architecture is developed to model the functions of standard MPI using java agents. It remedies...