833 search results - page 28 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
VLSISP
2008
13 years 7 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
FCCM
2009
IEEE
13 years 5 months ago
2009
IEEE
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
ASPDAC
2012
ACM
12 years 3 months ago
2012
ACM
Abstract— Integrating optical interconnects into the nextgeneration multi-/many-core architecture has been considered a viable solution to addressing the limitations in throughpu...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
CF
2004
ACM
14 years 1 months ago
2004
ACM
We introduce MaRS, a reconfigurable, parallel computing engine with special emphasis on scalability, lending itself to the computation-/data-intensive multimedia data processing a...