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    CDES
    2006
    184views Hardware» more  CDES 2006»
    Compilation for Future Nanocomputer Architectures
    13 years 9 months ago
    Compilation for Future Nanocomputer Architectures
    Download  www.csc.villanova.edu
    Compilation has a long history of translating a programmer's human-readable code into machine instructions designed to make good use of a specific target computer. In this pa...
    Thomas P. Way
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    WSC
    1998
    119views Modeling And Simulation» more  WSC 1998»
    Architecture for a Non-deterministic Simulation Machine
    13 years 9 months ago
    Architecture for a Non-deterministic Simulation Machine
    Download  www.informs-sim.org
    Causality constraints of random discrete simulation make parallel and distributed processing difficult. Methods of applying reconfigurable logic to implement and accelerate simula...
    Marc Bumble, Lee D. Coraor
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    FCCM
    2008
    IEEE
    176views VLSI» more  FCCM 2008»
    The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
    13 years 7 months ago
    The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
    Download  www.cse.unsw.edu.au
    Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
    Shannon Koh, Oliver Diessel
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    PARLE
    1993
    192views Distributed And Parallel Com...» more  PARLE 1993»
    On the Performance of Parallel Join Processing in Shared Nothing Database Systems
    13 years 11 months ago
    On the Performance of Parallel Join Processing in Shared Nothing Database Systems
    Download  wwwlgis.informatik.uni-kl.de
    : Parallel database systems aim at providing high throughput for OLTP transactions as well as short response times for complex and data-intensive queries. Shared nothing systems re...
    Robert Marek, Erhard Rahm
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    HPCA
    2009
    IEEE
    172views Distributed And Parallel Com...» more  HPCA 2009»
    Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
    14 years 8 months ago
    Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy
    Download  www.cs.utah.edu
    Cache hierarchies in future many-core processors are expected to grow in size and contribute a large fraction of overall processor power and performance. In this paper, we postula...
    Niti Madan, Li Zhao, Naveen Muralimanohar, Anirudd...
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