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» Parallel Processing Architectures for Reconfigurable Systems
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AAAI
1990
13 years 9 months ago
The Design of a Marker Passing Architecture for Knowledge Processing
Knowledge processing is very demanding on computer architectures. Knowledge processing generates subcomputation paths at an exponential rate. It is memory intensive and has high c...
Wing Lee, Dan I. Moldovan
ISCAS
2007
IEEE
133views Hardware» more  ISCAS 2007»
14 years 2 months ago
Design of a Massively Parallel Vision Processor based on Multi-SIMD Architecture
— Increasing demands for robust image recognition systems require vision processors not only with enormous computational capacities but also with sufficient flexibility to hand...
Kota Yamaguchi, Yoshihiro Watanabe, Takashi Komuro...
DFT
2008
IEEE
120views VLSI» more  DFT 2008»
14 years 2 months ago
Built-in-Self-Diagnostics for a NoC-Based Reconfigurable IC for Dependable Beamforming Applications
Integrated circuits (IC) targeting at the streaming applications for tomorrow are becoming a fast growing market. Applications such as beamforming require mass computing capabilit...
Oscar Kuiken, Xiao Zhang, Hans G. Kerkhoff
IEEEPACT
2000
IEEE
14 years 3 days ago
Fine Grained Multithreading with Process Calculi
ÐThis paper presents a multithreaded abstract machine for the TyCO process calculus. We argue that process calculi provide a powerful framework to reason about fine-grained parall...
Luís M. B. Lopes, Fernando M. A. Silva, Vas...
COLCOM
2008
IEEE
14 years 2 months ago
Serial vs. Concurrent Scheduling of Transmission and Processing Tasks in Collaborative Systems
In collaboration architectures, a computer must perform both processing and transmission tasks. Intuitively, it seems that these independent tasks should be executed in concurrent ...
Sasa Junuzovic, Prasun Dewan