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» Parallel Processing Architectures for Reconfigurable Systems
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2008
IEEE
14 years 3 months ago
Service-Oriented Enterprise Architectures: Evolution of Concepts and Methods
This paper depicts the evolution of enterprise architectures to their today often used service-oriented form and presents a state-of-the-art development process for this kind of a...
Gregor Engels, Martin Assmann
ICS
2003
Tsinghua U.
14 years 2 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 9 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
DATE
2009
IEEE
159views Hardware» more  DATE 2009»
14 years 3 months ago
Design and implementation of a database filter for BLAST acceleration
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
Panagiotis Afratis, Constantinos Galanakis, Euripi...
ISORC
2007
IEEE
14 years 3 months ago
Device Modeling for a Flexible Embedded Systems Development Process
Methodologies, techniques and tools that currently support the embedded systems (ESs) development process prove inadequate for today’s complex ESs. Adopted traditional architect...
Kleanthis C. Thamboulidis, George S. Doukas, Giann...